Anna Bernasconi and Valentina Ciriani.
Logic Synthesis and Testability of D-Reducible Functions. in
18th IFIP/IEEE International Conference on Very Large Scale Integration, 2010.
This page contains my publications grouped by year of publication. The papers grouped by type can be founded here.
Anna Bernasconi, Valentina Ciriani, Valentino Liberali, Gabriella Trucco, and Tiziano Villa, Synthesis of P-Circuits for Logic Restructuring. . Integration - the VLSI journal,
2012 (to appear).
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, S. Jajodia, S. Paraboschi, and P. Samarati,
Selective Data Outsourcing for Enforcing Privacy, in Journal of Computer Security, 2011.
Anna Bernasconi and Valentina Ciriani, Dimension-reducible Boolean Functions based on Affine Spaces,
in ACM Transactions on Design Automation of Electronic Systems (TODAES), 2011.
Anna Bernasconi and Valentina Ciriani, Autosymmetric Multiple-Valued Functions: Theory and
Spectral Characterization in IEEE 41st International Symposium on Multiple-Valued
Logic (ISMVL), Tuusula, Finland, 2011.
Anna Bernasconi, Valentina Ciriani, Valentino Liberali, Gabriella Trucco, and Tiziano Villa,
An Approximation Algorithm for Cofactoring-Based Synthesis, in 21st Great Lakes
Symposium on VLSI (GLSVLSI), Lausanne, 2011.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, G. Livraga, and P. Samarati,
"Enforcing Confidentiality and Data Visibility Constraints: An OBDD Approach,"
in Proc. of the 25th Annual IFIP WG 11.3 Conference on Data and Applications
Security and Privacy (DBSec 2011), Richmond, VA, USA, 2011.
Anna Bernasconi and Valentina Ciriani, Compact and Testable Circuits for Regular Functionsin, in
Exploiting Regularity in the Design of IPs, Architectures and Platforms (ERDIAP), Como, 2011.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, S. Jajodia, S. Paraboschi, and P. Samarati.
Combining Fragmentation and Encryption to Protect Privacy in Data Storage,
in ACM Transactions on Information and System Security (TISSEC), 2010.
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa.
Logic Synthesis by Signal-Driven Decomposition, in
Advanced Techniques in Logic Synthesis, Optimizations and Applications, Sunil Khatri and
Kanupriya Gulati (eds.), Springer, 2010.
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, and Linda Pagli.
Fun at a Department Store: Data Mining Meets Switching Theory,
in International Conference on FUN with Algorithms, 2010.
Anna Bernasconi and Valentina Ciriani.
Logic Synthesis and Testability of D-Reducible Functions. in
18th IFIP/IEEE International Conference on Very Large Scale Integration, 2010.
Valentina Ciriani and Anna Bernasconi.
SEPP: a New Compact Three-Level Logic Form.
International Workshop on Boolean Problems (IWSBP), 2010.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, and P. Samarati.
Theory of Privacy and Anonymity, in Algorithms and Theory of Computation Handbook
(2nd edition), M. Atallah, and M. Blanton (eds.), CRC Press, 2009.
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa.
On Decomposing Boolean Functions via Extended Cofactoring.
Design, Automation and Test in Europe (DATE), 2009.
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa.
Logic Minimization and Testability of 2SPP-P-Circuits.
Euromicro Conference on Digital Systems Design (DSD):
Architectures, Methods and Tools, 2009.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, S. Jajodia, S. Paraboschi, and P. Samarati.
Fragmentation Design for Efficient Query Execution over Sensitive Distributed Databases.
29th International Conference on Distributed Computing Systems (ICDCS), 2009.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, S. Jajodia, S. Paraboschi, and P. Samarati.
Keep a Few: Outsourcing Data while Maintaining Confidentiality.
14th European Symposium On Research In Computer Security (ESORICS), 2009.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, S. Jajodia, S. Paraboschi, and P. Samarati.
Enforcing Confidentiality Constraints on Sensitive Databases with Lightweight Trusted Clients.
23rd Annual IFIP WG 11.3 Working Conference on Data and Applications Security
(DBSec'09), 2009.
Giorgio Boselli, Valentina Ciriani, Gabriella Trucco, and Valentino Liberali.
A comparison between two logic synthesis forms from the digital switching noise viewpoint.
International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS),
LNCS 5349, Springer, pp. 237-246, 2009.
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa. Logic Minimization and Testability of 2-SPP Networks
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD), volume 27 issue 7, July 2008.
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, and Linda Pagli.
Synthesis of Autosymmetric Functions in a New Three-Level Form.
Theory of Computing Systems (TOCS), volume 42 issue 4, pp. 450-464, May 2008.
Anna Bernasconi, Valentina Ciriani and Roberto Cordone.
The optimization of kEP-SOPs: computational complexity, approximability and experiments.
ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13 issue 2, April 2008.
Görschwin Fey, Anna Bernasconi, Valentina Ciriani, Rolf Drechsler.
On the Construction of Small Fully Testable Circuits with Low Depth.
Embedded Hardware Design (Microprocessors and Microsystems), Elsevier, available online, April 2008.
Anna Bernasconi, Valentina Ciriani and Roberto Cordone.
Logic Synthesis of EXOR Projected Sum of Products.
Invited chapter in VLSI-SoC: Research Trends in VLSI and Systems on Chip,
G. De Micheli, S. Mir, R. Reis (eds), Springer-Verlag, 2008.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, P. Samarati.
k-Anonymous Data Mining: A Survey, in Privacy-Preserving Data Mining: Models and Algorithms,
Charu C. Aggarwal and Philip S. Yu (eds), Springer-Verlag, 2008.
Anna Bernasconi, Valentina Ciriani, and Roberto Cordone.
On Projecting Sums of Products.
Euromicro Conference on Digital Systems Design (DSD):
Architectures, Methods and Tools, 2008.
Anna Bernasconi, Valentina Ciriani, and Roberto Cordone.
An Approximation Algorithm for Generalized EXOR Projected Sum of Products.
16th IFIP/IEEE International Conference on Very Large Scale Integration , 2008.
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, and Linda Pagli. A New Heuristic for DSOP Minimization.
International Workshop on Boolean Problems (IWSBP), 2008.
V. Ciriani, P. Ferragina, F. Luccio, and S. Muthukrishnan.
A Data Structure for a Sequence of String Accesses in External Memory.
ACM Transactions on Algorithms, volume 3 issue 1, 2007.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, and P. Samarati.
k-Anonymity, in Secure Data Management in Decentralized Systems,
T. Yu and S. Jajodia (eds), Springer-Verlag, 2007.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, and P. Samarati.
Microdata Protection, in Secure Data Management in Decentralized Systems,
T. Yu and S. Jajodia (eds), Springer-Verlag, 2007.
V. Ciriani, S. De Capitani di Vimercati, S. Foresti, S. Jajodia, S. Paraboschi, P. Samarati.
Fragmentation and Encryption to Enforce Privacy in Data Storage,
12th European Symposium On Research In Computer Security (ESORICS),
Dresden, Germany, 2007.
Goerschwin Fey, Anna Bernasconi, Valentina Ciriani, Rolf Drechsler.
On the Construction of Small Fully Testable Circuits with Low Depth,
Euromicro Conference on Digital System Design (DSD)
Architectures, Methods and Tools, Lübeck, Germany, 2007.
Anna Bernasconi, Valentina Ciriani and Roberto Cordone.
An Approximation Algorithm for Fully Testable kEP-SOP.
14th ACM Great Lakes Symposium on VLSI (GLSVLSI) . Stresa, 2007.
Valentina Ciriani, Anna Bernasconi, Rolf Drechsler. Testability of SPP Three-Level Logic
Networks in Static Fault Models. IEEE Transactions on Computer Aided Design of
Integrated Circuits and Systems (TCAD), volume 25 issue 10 pp. 2241-2248, October 2006.
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, and Linda Pagli. Exploiting Regularities
for Boolean Function Synthesis. Theory of Computing Systems (TOCS), 2006.
Valentina Ciriani, Anna Bernasconi, and Rolf Drechsler.
Stuck-At-Fault Testability of SPP Three-Level Logic Forms.
Invited chapter in VLSI-SOC: From Systems to Chips,
M. Glesner, R. Reis, L. Indrusiak, V. Mooney, H. Eveking (Eds.),
Kluwer-Springer, 2006, ISBN: 0-387-33402-5.
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa.
Efficient Minimization of Fully Testable 2-SPP Networks.
Design, Automation and Test in Europe (DATE). Munich, 2006.
Anna Bernasconi, Valentina Ciriani.
DSOP: Synthesis of a new class of regular functions.
9th Euromicro Conference on Digital Systems Design: Architectures, Methods and Tools.. Croatia, 2006.
Anna Bernasconi, Valentina Ciriani and Roberto Cordone.
EXOR Projected Sum of Products.
14th IFIP/IEEE International Conference on Very Large Scale Integration . Nice, 2006.
Anna Bernasconi, Valentina Ciriani and Roberto Cordone.
EXOR Projected Sum of Products (Abstract).
AIRO 2006 . Cesena, 2006.
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler, Tiziano Villa.
Efficient Minimization of Fully Testable 2-SPP Networks. Technical
Report TR-05-23, November 24, 2005
Valentina Ciriani, Anna Bernasconi, Rolf Drechsler.
Testability of SPP Three-Level Logic Networks in Static Fault Models. Technical
Report TR-05-18, July 14, 2005.
Valentina Ciriani,
Nadia Pisanti, and Anna Bernasconi. Room Allocation:
a Polynomial Subcase of the Quadratic Assignment Problem.
Discrete Applied Mathematics, volume 144 issue 3 pp. 263-269, 2004.
F. Luccio, S. Brunetti, V. Ciriani, E. Lodi, N. Pisanti. Locally free substitutions are not so
free: an open problem in sequence alignment. Fun with Algorithms 3 (FUN) ,
Edizioni Plus, pages 5-6, 2004.
Valentina Ciriani. Three-Level Logic Synthesis: Algebraic Approach and Minimization
Algorithms. Ph.D. Thesis, Dipartimento di Informatica,
University of Pisa, TD-1/03, March 2003.
Anna Bernasconi, Valentina Ciriani, Fabrizio Luccio, and Linda Pagli.
Three-Level Logic Minimization Based on Function Regularities. IEEE Transactions on
Computer-Aided Design of Integrated Circuits and Systems (Special Section on Design Automation
Conference 2002), volume 22 issue 8 pp. 1005-1016, August 2003.
Valentina Ciriani. Synthesis of SPP Three-Level Logic Networks using
Affine Spaces. IEEE Transactions on Computer-Aided Design of Integrated Circuits and
Systems, volume 22 issue 10 pp. 1310-1323, October 2003. Also Technical Report
TR-02-03.
Valentina Ciriani, Fabrizio Luccio, and Linda Pagli. Synthesis of
Integer Multipliers in Sum of Pseudoproducts Form. Integration - the VLSI journal,
volume 36 issue 3 pp. 103-118, 2003.
Valentina Ciriani,
Anna Bernasconi, and Rolf Drechsler. Testability of SPP Three-Level Logic Networks.
12th IFIP/IEEE International Conference on Very Large Scale Integration , 331-336, 2003.
Valentina Ciriani.
Three-Level Logic Synthesis: Algebraic Approach and Minimization Algorithms.
Poster at the Ph.D. Forum, 12th IFIP International Conference on Very Large Scale
Integration (VLSI-SoC 2003), pag. 455, 2003.
V. Ciriani, P. Ferragina, F. Luccio, and S. Muthukrishnan.
Static Optimality Theorem for External
Memory String Access. 43rd IEEE Symposium
on Foundations of Computer Science (FOCS02), 219-227, 2002.
Anna Bernasconi,
Valentina Ciriani, Fabrizio Luccio, and Linda Pagli. Fast Three-Level Logic Minimization Based on Autosymmetry.
39th ACM/IEEE Design Automation Conference (DAC02),
425-430, 2002.
Anna Bernasconi,
Valentina Ciriani, Fabrizio Luccio, and Linda Pagli. Implicit Test of Regularity for Incompletely Specified Boolean
Functions. 11th IEEE/ACM International Workshop on Logic
& Synthesis (IWLS02), 345-350, 2002
Valentina Ciriani,
Anna Bernasconi. 2-SPP: a practical trade-off between SP and SPP synthesis
. 5th International Workshop on Boolean Problems (IWSBP2002),
133-140, 2002.
Valentina Ciriani.
Logic Minimization using Exclusive OR Gates.
38th ACM/IEEE Design Automation Conference (DAC01), 115-120, 2001.
Valentina Ciriani,
Nadia Pisanti and Anna Bernasconi. Efficient optimal greedy algorithms for room allocation
. FUN with algorithms, 43-60, 2001. V. Ciriani,
P. Ferragina, F. Luccio and S. Muthukrishnan. Self-adjusting Data Structures for External Memory String Access
, Technical Report TR-01-26, November 20012000
Valentina Ciriani.
The characterization of the sub-pseudocubes of a pseudocube
, Technical Report TR-00-02, March 20001999
Tito Ciriani
and Valentina Ciriani.
Data Mining at Work,
Airo News IV, 1, Spring 1999, 7-10. Valentina Ciriani.
Multipliers based on Wallace trees and pseudo-products,
Technical Report TR-99-19, November 19991998
Valentina Ciriani.
Hash su grafi e confronto tra sequenze (in Italian), Master thesis, July 1998,
University of Pisa. Tito Ciriani and
Valentina Ciriani. Data Mining Methods and Applications,
Airo News III, 4, Winter 1998, 7-11 .